System-on-chip Test Architectures Nanometer Design for Testability Wang, Laung-Terng. Stroud, Charles E. Touba, Nur A. text bibliography ne Amsterdam Boston Morgan Kaufmann Publishers c2008 2008 monographic eng
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xxxvi, 856 p. : ill. ; 25 cm. edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. Includes bibliographical references and index. Systems on a chip Testing Integrated circuits Very large scale integration Testing Integrated circuits Very large scale integration Design TK7895.E42 S978 2008 621.39/5 The Morgan Kaufmann series in systems on silicon 9780123739735 (hardcover : alk. paper) 012373973X (hardcover : alk. paper) 2007023373 http://www.loc.gov/catdir/toc/ecip0719/2007023373.html http://www.loc.gov/catdir/enhancements/fy0808/2007023373-d.html http://www.loc.gov/catdir/toc/ecip0719/2007023373.html http://www.loc.gov/catdir/enhancements/fy0808/2007023373-d.html DLC 070604 20210914163054.0 14878050