01594cam a2200373 a 4500 6768 6768 14878050 OSt 20210914163054.0 070604s2008 ne a b 001 0 eng 2007023373 9780123739735 (hardcover : alk. paper) 012373973X (hardcover : alk. paper) (OCoLC)ocn140109577 (OCoLC)140109577 DLC DLC BAKER BTCTA YDXCP C#P DLC TK7895.E42 S978 2008 621.39/5 22 System-on-chip Test Architectures : Nanometer Design for Testability / edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba. Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008. xxxvi, 856 p. : ill. ; 25 cm. The Morgan Kaufmann series in systems on silicon Includes bibliographical references and index. Systems on a chip Testing. Integrated circuits Very large scale integration Testing. Integrated circuits Very large scale integration Design. Wang, Laung-Terng. Stroud, Charles E. Touba, Nur A. Table of contents only http://www.loc.gov/catdir/toc/ecip0719/2007023373.html Publisher description http://www.loc.gov/catdir/enhancements/fy0808/2007023373-d.html 7 cbc orignew 1 ecip 20 y-gencatlg lcc MON 0 0 lcc 0 0 001 001 2020-02-07 Donation from Kenyatta University 0 TK7895.E42 S978 2008 2020-0794 2020-02-07 00:00:00 1 2020-02-07 MON 0 0 lcc 0 0 002 002 2020-02-15 0 TK7895.E42 S978 2008 021071 2020-02-15 00:00:00 2 2020-02-15 MON